Ambarella unveils centrally processed 4D imaging radar architecture for autonomous mobility systems - The EE

Ambarella unveils centrally processed 4D imaging radar architecture for autonomous mobility systems

Santa Clara, United States – Ambarella, Inc., an edge AI semiconductor company, has announced the centralised 4D imaging radar architecture, which allows both central processing of raw radar data and deep, low-level fusion with other sensor inputs including cameras, lidar and ultrasonics.

This breakthrough architecture provides greater environmental perception and safer path planning in AI-based ADAS and L2+ to L5 autonomous driving systems, as well as autonomous robotics. It features Ambarella’s Oculii radar technology, including the AI software algorithms that adapt radar waveforms to the surrounding environment providing high angular resolution of 0.5 degrees, an ultra-dense point cloud up to 10s of thousands of points per frame and a long detection range up to 500+ metres. All of this is achieved with an order of magnitude fewer antenna MIMO channels, which reduces the data bandwidth and achieves significantly lower power consumption than competing 4D imaging radars. Ambarella’s centralised 4D imaging radar with Oculii technology provides a flexible and high performance perception architecture that enables system integrators to future proof their radar designs.

“There were ~100M radar units manufactured in 2021 for automotive ADAS,” explains Cédric Malaquin, team lead analyst of RF activity at Yole Intelligence, part of Yole Group. “We expect this volume to grow 2.5-fold by 2027, given the more demanding regulations on safety and more advanced driving automation systems hitting the road. Indeed, from the current 1-3 radar sensors per car, OEMs will move to 5 radar sensors per car as a baseline. Besides, there is an exciting debate on the radar processing partitioning and many developments associated. One approach is centralised radar computing that will enable OEMs to offer significantly higher performance imaging radar systems and new ADAS/AD features while simultaneously optimising the cost of radar sensing.”

To create this cost-effective new architecture, Ambarella optimised the Oculii algorithms for its CV3 AI domain controller SoC family and added specific radar signal processing acceleration. The CV3’s AI performance per watt offers the high compute and memory capacity needed to achieve high radar density, range and sensitivity. Additionally, a single CV3 can efficiently provide high-performance, real-time processing for perception, low-level sensor fusion and path planning, centrally and simultaneously, within autonomous vehicles and robots.

“No other semiconductor and software company has advanced in-house capabilities for both radar and camera technologies, as well as AI processing,” says Fermi Wang, president and CEO of Ambarella. “This expertise allowed us to create an unprecedented centralised architecture that combines our unique Oculii radar algorithms with the CV3’s industry-leading domain control performance per watt to efficiently enable new levels of AI perception, sensor fusion and path planning that will help realise the full potential of ADAS, autonomous driving and robotics.”

The data sets of competing 4D imaging radar technologies are too large to transport and process centrally. They generate multiple terabits per second of data per module, while consuming more than 20 watts of power per radar module, due to thousands of MIMO antennas used by each module to provide the high angular resolution required for 4D imaging radar. That is multiplied across the six or more radar modules required to cover a vehicle, making central processing impractical for other radar technologies, which must process radar data across thousands of antennas.

By applying AI software to dynamically adapt the radar waveforms generated with existing monolithic microwave integrated circuit (MMIC) devices, and using AI sparsification to create virtual antennas, Oculii technology reduces the antenna array for each processor-less MMIC radar head in this new architecture to 6 transmit x 8 receive. Overall, the number of MMICs is drastically reduced, while achieving an extremely high 0.5 degrees of joint azimuth and elevation angular resolution. Additionally, Ambarella’s centralised architecture consumes significantly less power, at the maximum duty cycle, and reduces the bandwidth for data transport by 6x, while eliminating the need for pre-filtered, edge processing and its resulting loss in sensor information.

This cost-effective, software-defined centralised architecture also enables dynamic allocation of the CV3’s processing resources, based on real-time conditions, both between sensor types and among sensors of the same type. For example, in extreme rainy conditions that diminish long-range camera data, the CV3 can shift some of its resources to improve radar inputs. Likewise, if it is raining while driving on a highway, the CV3 can focus on data coming from front-facing radar sensors to further extend the vehicle’s detection range while providing faster reaction times. This can’t be done with an edge-based architecture, where the radar data is being processed at each module, and where processing capacity is specified for worst-case scenarios and often goes underutilised.

These two different approaches to radar processing are summarised in the following table…

Competing Edge-Processed RadarAmbarella’s Centralised Radar Processing
Constant, repeated radar waveforms without regard for environmental conditionsOculii AI software algorithms dynamically adapt radar waveforms to surrounding environment
MMIC + edge radar processor in moduleMMIC only in “radar head”
Radar detection processing in radar moduleRadar detection processing in central processor
Multiple terabits per second, per module of radar data (too large to transport and process centrally)6x bandwidth reduction for radar data transport
1+ to 2 degree resolution0.5 degrees of joint azimuth and elevation angular resolution
High power consumption, due to 1000s of antenna MIMO channels used by each radar moduleLow power consumption, due to order of magnitude fewer antenna MIMO channels (6 transmit x 8 receive antennas in each processor-less MMIC radar head)
No dynamic processing allocation (specified for worst-case scenarios)Dynamic allocation of CV3’s processing resources, based on real-time conditions, between sensor types and among sensors of same type
Slow processing speedsCV3 is up to 100x faster than traditional edge radar processors

CV3 marks the debut of Ambarella’s next-generation CVflow architecture, with a neural vector processor and a general vector processor, which were both designed by Ambarella from the ground up to include radar-specific signal processing enhancements. These processors work in tandem to run the Oculii advanced radar perception software with far higher performance, including speeds up to 100x faster than traditional edge radar processors can achieve.

Additional benefits of this new centralised architecture include easier over-the-air (OTA) software updates, for continuous improvement and future proofing. In contrast, each edge radar module’s processor must be updated individually, after determining the processor and OS being used in each; whereas a single OTA update can be pushed to the CV3 SoC and aggregated across all of the system’s radar heads. These radar heads eliminate the need for a processor, which reduces costs for both the upfront bill of materials and in the event of damage from an accident (most radars are located behind the vehicle’s bumper). Additionally, many of the edge-processor radar modules deployed today never receive software updates because of this software complexity.

Target applications for the new centralised radar architecture include ADAS and level 2+ to level 5 autonomous vehicles, as well as autonomous mobile robots (AMRs) and automated guided vehicle (AGV) robots. These designs are streamlined by Ambarella’s unified and flexible software development environment, which provides automotive and robotics designers with a software-upgradable platform for scaling performance from ADAS and L2+ to L5.


This new centralised architecture will be demonstrated at Ambarella’s invitation-only event taking place during CES. Contact your Ambarella representative to schedule a meeting. For sampling and evaluation information on the Oculii AI radar technology and CV3 AI domain controller SoC family, contact Ambarella.

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